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PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
Rev. 01 -- 25 September 2008 Product data sheet
1. Product profile
1.1 General description
Ultra low capacitance single rail-to-rail ElectroStatic Discharge (ESD) protection device in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package designed to protect one Hi-Speed data line or high-frequency signal line from the damage caused by ESD and other transients. PRTR5V0U1T incorporates one ultra low capacitance rail-to-rail protection channel as well as an additional ESD protection diode to ensure signal line protection even if no supply voltage is available.
1.2 Features
I I I I I I I ESD protection of one Hi-Speed data line or high-frequency signal line Ultra low input/output to ground capacitance: C(I/O-GND) = 1 pF ESD protection up to 8 kV IEC 61000-4-2, level 4 (ESD) Very low clamping voltage due to an integrated additional ESD protection diode Very low reverse current Small SMD plastic package
1.3 Applications
I I I I I I I USB interfaces (2.0) Digital Video Interface (DVI) / High Definition Multimedia Interface (HDMI) interfaces Mobile and cordless phones Personal Digital Assistants (PDA) Digital cameras Wide Area Network (WAN) / Local Area Network (LAN) systems PCs, notebooks, printers and other PC peripherals
NXP Semiconductors
PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
1.4 Quick reference data
Table 1. Quick reference data Tamb = 25 C unless otherwise specified. Symbol Per channel C(I/O-GND) Zener diode VRWM Csup
[1] [2]
Parameter input/output to ground capacitance reverse standoff voltage supply pin to ground capacitance
Conditions f = 1 MHz; V(I/O-GND) = 0 V
[1]
Min -
Typ 1
Max 1.5
Unit pF
f = 1 MHz; VCC = 0 V
[2]
16
5.5 -
V pF
-
Measured from pin 1 to ground. Measured from pin 2 to ground.
2. Pinning information
Table 2. Pin 1 2 3 I/O VCC GND Pinning Description input/output supply voltage ground
1 2 3
3
Symbol
Simplified outline
Graphic symbol
1
2
006aab111
3. Ordering information
Table 3. Ordering information Package Name PRTR5V0U1T Description plastic surface-mounted package; 3 leads Version SOT23 Type number
4. Marking
Table 4. Marking codes Marking code[1] ZN* Type number PRTR5V0U1T
[1] * = -: made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China
PRTR5V0U1T_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 25 September 2008
2 of 11
NXP Semiconductors
PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
5. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Per device Tamb Tstg ambient temperature storage temperature -40 -55 +85 +125 C C Parameter Conditions Min Max Unit
Table 6. ESD maximum ratings Tamb = 25 C unless otherwise specified. Symbol VESD Parameter electrostatic discharge voltage IEC 61000-4-2; level 4 (contact discharge) MIL-STD-883 (human body model)
[1] [2] Device stressed with ten non-repetitive ESD pulses. Measured from pin 1 to 2 or 3.
Conditions
[1][2]
Min
Max
Unit
Per channel 8 10 kV kV
Table 7. Standard Per diode
ESD standards compliance Conditions > 8 kV (contact)
IEC 61000-4-2; level 4 (ESD)
001aaa631
IPP 100 % 90 %
10 % tr = 0.7 ns to 1 ns 30 ns 60 ns t
Fig 1.
ESD pulse waveform according to IEC 61000-4-2
PRTR5V0U1T_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 25 September 2008
3 of 11
NXP Semiconductors
PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
6. Characteristics
Table 8. Characteristics Tamb = 25 C unless otherwise specified. Symbol Per channel IR C(I/O-GND) VF Zener diode VRWM VBR Csup
[1] [2]
Parameter reverse current input/output to ground capacitance forward voltage reverse standoff voltage breakdown voltage supply pin to ground capacitance
Conditions VR = 3 V f = 1 MHz; V(I/O-GND) = 0 V
[1] [1]
Min [2]
Typ <1 1 0.7 16
Max 100 1.5 5.5 9 -
Unit nA pF V V V pF
6 -
f = 1 MHz; VCC = 0 V
[2]
Measured from pin 1 to ground. Measured from pin 2 to ground.
2.0 C(I/O-GND) (pF) 1.6
006aaa483
1.2
0.8
0.4
0 0 1 2 3 4 5 V(I/O-GND) (V)
f = 1 MHz; Tamb = 25 C
Fig 2.
Input/output to ground capacitance as a function of input/output to ground voltage; typical values
PRTR5V0U1T_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 25 September 2008
4 of 11
NXP Semiconductors
PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
ESD TESTER RZ CZ
450
RG 223/U 50 coax
4 GHz DIGITAL OSCILLOSCOPE 10x ATTENUATOR
50
IEC 61000-4-2 network CZ = 150 pF; RZ = 330
DUT Device Under Test
vertical scale = 200 V/div horizontal scale = 50 ns/div
vertical scale = 10 V/div horizontal scale = 50 ns/div
GND
GND
unclamped +1 kV ESD voltage waveform (IEC 61000-4-2 network)
clamped +1 kV ESD voltage waveform (IEC 61000-4-2 network)
vertical scale = 10 V/div horizontal scale = 50 ns/div GND
GND
vertical scale = 200 V/div horizontal scale = 50 ns/div unclamped -1 kV ESD voltage waveform (IEC 61000-4-2 network) clamped -1 kV ESD voltage waveform (IEC 61000-4-2 network)
006aab112
Fig 3.
ESD clamping test setup and waveforms
PRTR5V0U1T_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 25 September 2008
5 of 11
NXP Semiconductors
PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
7. Application information
With a capacitance of only 1 pF, the PRTR5V0U1T offers IEC 61000-4-2, level 4 compliant ESD protection. The PRTR5V0U1T integrates one ultra low capacitance rail-to-rail ESD protection channel and an additional ESD protection diode. The additional ESD protection diode connected between ground and VCC prevents charging of the supply. To achieve the maximum ESD protection level, no additional external capacitors are required. Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The following guidelines are recommended: 1. Place the PRTR5V0U1T as close to the input terminal or connector as possible. 2. The path length between the PRTR5V0U1T and the protected line should be minimized. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops. 6. Minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias.
PRTR5V0U1T_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 25 September 2008
6 of 11
NXP Semiconductors
PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
8. Package outline
3.0 2.8
3
1.1 0.9
0.45 0.15 2.5 1.4 2.1 1.2
1
2
1.9 Dimensions in mm
0.48 0.38
0.15 0.09 04-11-04
Fig 4.
Package outline SOT23 (TO-236AB)
9. Packing information
Table 9. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number PRTR5V0U1T
[1]
Package SOT23
Description 4 mm pitch, 8 mm tape and reel
Packing quantity 3000 -215 10000 -235
For further information and the availability of packing methods, see Section 13.
PRTR5V0U1T_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 25 September 2008
7 of 11
NXP Semiconductors
PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
10. Soldering
3.3 2.9 1.9
solder lands solder resist 3 1.7 2 solder paste 0.6 (3x) occupied area Dimensions in mm 0.5 (3x) 0.6 (3x) 1
sot023_fr
0.7 (3x)
Fig 5.
Reflow soldering footprint SOT23 (TO-236AB)
2.2 1.2 (2x)
1.4 (2x) solder lands 4.6 2.6 solder resist occupied area Dimensions in mm 1.4
preferred transport direction during soldering 2.8 4.5
sot023_fw
Fig 6.
Wave soldering footprint SOT23 (TO-236AB)
PRTR5V0U1T_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 25 September 2008
8 of 11
NXP Semiconductors
PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
11. Revision history
Table 10. Revision history Release date 20080925 Data sheet status Product data sheet Change notice Supersedes Document ID PRTR5V0U1T_1
PRTR5V0U1T_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 25 September 2008
9 of 11
NXP Semiconductors
PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
12. Legal information
12.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.
12.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
PRTR5V0U1T_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 25 September 2008
10 of 11
NXP Semiconductors
PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
14. Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Application information. . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 Packing information. . . . . . . . . . . . . . . . . . . . . . 7 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Contact information. . . . . . . . . . . . . . . . . . . . . 10 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 25 September 2008 Document identifier: PRTR5V0U1T_1

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